CPU · 4 BIG CORESMEMMEMMEMGPU · 32 OF 16,384 LANES1# each lane: own px2px = min(px + 40, 255)1if px > 128:2 px = px - 403else:4 px = px + 401# lane (i, j):2c[i][j] = sum(3 a[i][k] * b[k][j]4 for k in range(n))
Cores: a glowing top means the core is workingPixels: grey tiles, each a number from 0 to 255Lit link with moving dashes: data is flowingCode card: the one instruction every lane runsA CPU has a few big cores; a GPU has many small lanes that all run the same instruction, each on its own piece of data. Teaching model: the CPU is drawn with 4 cores and the GPU with 32 lanes (one warp); the picture is 32 grey pixels. Real chips have many more of each. Warps: NVIDIA groups threads in 32s (CUDA Programming Guide, "Warps and SIMT"); lanes that skip a branch are masked off while the others run it. AMD uses wavefronts of 32 or 64 (GPUOpen RDNA Performance Guide).

Two kinds of chip

  1. A core is the part of a chip that runs instructions. A CPU has a few big, clever cores. Each one runs its own program fast and copes with any job. The Intel Core i9-13900K has 24 cores.

Same job, two ways

Inside the GPU

Where each wins

The numbers

;; step 1/10 · cpu
;; about: CPU
Intel Core i9-13900K (2022, Intel ARK)
  24 cores = 8 performance + 16 efficient
  32 threads
The figure draws 4 big cores.
Each core: its own instruction stream, branch prediction, big caches.

Core counts: Intel Core i9-13900K, 24 cores (8 performance + 16 efficient), max memory bandwidth 89.6 GB/s (Intel ARK); NVIDIA GeForce RTX 4090, 128 SMs x 128 = 16,384 CUDA cores, 1,008 GB/s (NVIDIA Ada whitepaper). A "CUDA core" is not a CPU core: it is one lane that does arithmetic. Instructions are fetched and scheduled per warp, not per lane, which is why a CUDA core is so much smaller.