Instruction sets
An instruction set is the list of commands a CPU understands and the exact bits that encode each one. Take the course's teaching CPU, TINY-8: its four registers and program counter, its 2-byte instruction format (opcode, d, s and an 8-bit immediate), and its 16 instructions in four groups. Then assemble a real program into bytes, watch the CPU fetch and decode them, and see how x86-64, ARM and RISC-V do the same job.
5 quick questions
Pick an answer to see why. Your score saves with your progress.
01TINY-8's opcode field is 4 bits wide. How many different instructions can it name?
4 bits give 2 × 2 × 2 × 2 = 16 patterns, from 0000 to 1111, so TINY-8 has exactly 16 instructions.
02LDI has opcode 0001. Which two bytes does the assembler make for LDI r0, 2?
Byte 0 is opcode 0001, d = 00 (r0), s = 00: 0001 0000 = 0x10. Byte 1 is the immediate value 2 = 0x02.
03In the program, the label loop: sits just before SUB r2, r3. What does JNZ loop store in its imm8 field?
A label is only a name for an address. Six 2-byte instructions come before it, so loop is address 12, and JNZ loop becomes 0xD0 0x0C.
04Which of these does the CPU actually read when it runs a program?
Assembly is for people. The assembler turns it into bytes, and the CPU fetches and decodes those bytes from memory.
05Which statement about real instruction sets is true?
x86-64 is a CISC design with variable-length instructions up to 15 bytes. ARM's A64 uses fixed 32-bit instructions, and RISC-V is an open standard.
Glossary
- Instruction set (ISA)
- The list of commands a CPU understands and the exact bit pattern that encodes each one. Programs for that CPU can only use those commands.
- Opcode
- Operation code: the bits of an instruction that say which command it is. TINY-8 uses 4 bits, so it has 16 opcodes.
- Register
- A small, fast store inside the CPU that holds one number. TINY-8 has four 8-bit registers, r0 to r3.
- Program counter (PC)
- The register that holds the memory address of the next instruction to fetch.
- Immediate
- A number written right inside an instruction, such as the 2 in LDI r0, 2. In TINY-8 it is the 8-bit imm8 byte.
- Assembly language
- A program written one instruction per line with short names (mnemonics) such as LDI and ADD, meant for people to read.
- Assembler
- A program that turns assembly into machine code, filling in the address of every label.
- Machine code
- The bytes a CPU fetches from memory and decodes: the only form of a program the CPU can run.
Notes and sources
- TINY-8 is a teaching CPU made for this course, with every instruction exactly 2 bytes. Real 8-bit CPUs were less tidy: the MOS 6502, for example, used instructions 1 to 3 bytes long.
- 0x marks a hexadecimal (base-16) number. Each hex digit stands for 4 bits, so one byte is two digits, from 0x00 to 0xFF (0 to 255).
- The assembler reads the program twice: first it counts addresses so it knows where each label is, then it writes the bytes with those addresses filled in.
- JNZ tests the Z flag. SUB sets Z to 1 when its result is 0, so the loop ends once r2 reaches 0.
- Intel's manual limits an x86-64 instruction to 15 bytes. Arm's A64 instructions are all 32 bits. RISC-V base instructions are 32 bits, and an optional extension adds 16-bit short forms; RISC-V is an open standard that anyone may implement without a licence fee.
- RISC (reduced instruction set computer) favours fewer, simpler, fixed-size instructions, where only loads and stores touch memory. CISC (complex instruction set computer) allows bigger instructions that can do several things at once. Modern x86 chips split their instructions into simpler internal steps.
- Nisan and Schocken, Nand2Tetris Project 4: Machine Language
- UC Berkeley CS61C: Great Ideas in Computer Architecture (RISC-V)
- The RISC-V Instruction Set Manual (ratified specifications)
- Arm Architecture Reference Manual for A-profile architecture
- Intel 64 and IA-32 Architectures Software Developer's Manuals
- Patterson and Ditzel, The Case for the Reduced Instruction Set Computer (ACM SIGARCH, 1980)
Quiz Unlocks after the last step.