Interrupts and I/O: how devices get the CPU's attention
A CPU has to deal with devices that need attention at moments it cannot predict: a keyboard, a timer, a network card. Watch TINY-8 poll its keyboard port over and over, then see the better way: the keyboard raises an interrupt line, the CPU finishes its instruction, saves the PC, runs a two-line handler and returns. Finish with timer interrupts and DMA, which copies data into memory without the CPU.
5 quick questions
Pick an answer to see why. Your score saves with your progress.
01TINY-8 runs IN r3, ADDI r3, 0, JZ 0 in a loop while no key is pressed. What is wrong with this?
That is polling. In 30 instructions TINY-8 checked the port 10 times and got 0 every time; nothing useful happened while it waited.
02A key goes down while the CPU is halfway through ADDI r0, 1. What happens first?
Interrupts are taken between instructions. The ADDI completes (r0 becomes 5, the PC moves to 4), and only then does the CPU see the line is up.
03Why does the hardware copy the PC into the saved-PC register before jumping to the handler?
The handler puts its own addresses (32, 34) in the PC. The saved 4 is how the CPU finds its way back; real CPUs restore it with a return instruction such as RETI or IRET.
04What is memory-mapped I/O?
TINY-8 and x86 use separate port instructions (IN, OUT). RISC-V and ARM map device registers into the address space and use normal loads and stores instead.
05What does a DMA controller do?
Without DMA the CPU would move every byte itself. With DMA it only sets up the copy and handles one interrupt at the end.
Glossary
- I/O
- Input and output: how a computer swaps data with devices such as keyboards, screens, disks and network cards.
- Port
- A numbered doorway to a device. TINY-8's IN reads input port 0 and OUT writes output port 0.
- Memory-mapped I/O
- Giving a device's registers memory addresses, so ordinary load and store instructions reach the device.
- Polling
- Checking a device again and again to see whether it is ready. Simple, but it wastes CPU time while the answer is no.
- Interrupt
- A signal from a device, on its own interrupt line, that makes the CPU pause its program between instructions and run a handler.
- Interrupt handler
- A short routine that serves one device; also called an interrupt service routine (ISR).
- Saved PC
- Where the CPU keeps the address to come back to while a handler runs; a return instruction puts it back in the PC.
- DMA
- Direct memory access: a controller that copies data between a device and memory without the CPU, then raises one interrupt.
Notes and sources
- Polling, interrupts and DMA are the three ways a CPU deals with devices: with polling the CPU keeps reading a device's status and wastes time waiting; with interrupts the device signals when it needs attention and the CPU runs a handler; with DMA a separate engine copies the data and interrupts once when it is done (Arpaci-Dusseau, Operating Systems: Three Easy Pieces, chapter 36).
- Devices are reached either through explicit I/O instructions on a separate port address space, like x86's IN and OUT and TINY-8's IN and OUT, or through memory-mapped I/O, where a device's registers have memory addresses and ordinary loads and stores reach them (Intel Software Developer's Manual, volume 1, Input/Output; Harris and Harris, Digital Design and Computer Architecture, chapter 9).
- Interrupts are taken between instructions: the instruction being executed is completed first, then the return address is saved and the CPU jumps to the handler. On the ATmega328P the PC is pushed onto the stack and RETI returns; RISC-V saves it in mepc and returns with MRET (ATmega328P datasheet, interrupt handling; RISC-V privileged specification).
- TINY-8, this course's teaching CPU, has IN and OUT on port 0 but no interrupt line and no return instruction. The figure adds the interrupt as hardware around the unchanged instruction set: a saved-PC register, a fixed handler address 32 for the keyboard's line, and a return that copies the saved PC back. Every instruction, byte and value comes from the TINY-8 simulator.
- A timer interrupt fires every few milliseconds and lets the operating system regain control of the CPU from a running program, which is how it shares the CPU between programs (Operating Systems: Three Easy Pieces, chapter 6).
- Real keyboards send scan codes that a driver turns into characters; the figure puts the ASCII code 65 for A on the port to keep it simple. The network bytes 72, 105, 33 spell "Hi!" in ASCII.
- The Python mirrors the hardware's check between instructions: if the line is up, keep the PC in 'saved' and load the handler's address.
- A lit wire with moving dashes is carrying the value the step is about; the white tags riding on it are those values. The round lamps show each interrupt line: glowing means 1.
- Operating Systems: Three Easy Pieces, chapter 36: I/O Devices
- Operating Systems: Three Easy Pieces, chapter 6: Limited Direct Execution (timer interrupts)
- The RISC-V Instruction Set Manual, Volume II: Privileged Architecture (mepc, mtvec, MRET)
- Microchip ATmega328P (datasheet: reset and interrupt handling, USART)
- Intel 64 and IA-32 Architectures Software Developer's Manuals (IN, OUT, IRET)
- Harris and Harris, Digital Design and Computer Architecture: RISC-V Edition
- Python documentation: ord()
Quiz Unlocks after the last step.