Flip-flops in a row
A D flip-flop stores one bit. At each rising clock edge, the moment the clock goes from 0 to 1, it copies its input D to its output Q. A register is a row of them: 4 flip-flops hold 4 bits.
All four flip-flops share one clock wire, so every bit is captured at the same instant. Watch the inputs change to 0110: the stored value stays 1011 until the next rising edge, then all four bits change together.
Load or keep
A load signal, also called enable, decides whether the register changes. In front of each flip-flop sits a multiplexer, or mux: a switch that passes one of its two inputs. Load picks which one.
With load at 0, each mux sends the flip-flop's own Q back to its D. At every edge each flip-flop copies its old bit, so the register keeps 1001 although the inputs change.
Set load to 1 and each mux passes the new data bit instead. At the next rising edge all four flip-flops take it together: 1001 becomes 0110 in one clock tick.
Shift registers
Now wire each flip-flop's Q to the next one's input: a shift register. At every rising edge each bit moves one place to the right, a new bit enters on the left and the last bit drops out.
Shifting a binary number one place right halves it, dropping any remainder, just as moving a decimal number one place right divides by ten. Here 1100 (12) becomes 0110 (6), then 0011 (3).
Register files
A processor keeps several registers together in a register file. This one has four, R0 to R3, each 4 bits. A decoder picks which register to write; a read mux picks which one to read.
To write 0110 into R2, the decoder gets the number 2 (10 in binary). It sets load to 1 for R2 only. At the clock edge R2 takes 0110; the other three registers keep their values.
To read, the register number goes to the read mux, which passes that register's bits straight out. Reading R1 gives 1110. A read changes nothing and needs no clock edge.
The bits, edge by edge
;; step 1/10 · a-register ;; about: Data in, Flip-flops, Clock D flip-flop: 1 bit of memory rising clock edge: Q takes D any other time: Q holds 4 flip-flops → a 4-bit register 8 flip-flops → an 8-bit register 32 flip-flops → a 32-bit register here: D = 1011 → at the edge Q = 1011
A register with a load (enable) input puts a 2-input multiplexer in front of each flip-flop: with load 0 the mux feeds Q back to D, so the flip-flop reloads its own value at every edge (Harris and Harris, section 3.2.5; Nand2Tetris chapter 3 builds its Bit chip the same way). In Python, x >> n is floor division by 2 to the power n, so 12 >> 1 is 6 and 7 >> 1 is 3: the bit shifted out is the remainder that gets dropped.