ROM and flash: memory that remembers
Pull the plug and DRAM forgets, but ROM and flash keep their bits. See how a mask ROM's bits are built into the chip, then open up a flash cell: a transistor with a floating gate that traps electrons, which raises its threshold voltage so it reads 0. Watch a whole block erase to 1s, one page get written, and the controller spread wear across blocks. Finish with NOR versus NAND and where flash lives.
5 quick questions
Pick an answer to see why. Your score saves with your progress.
01What makes ROM and flash non-volatile?
Non-volatile means the data survives without power. DRAM is volatile: its bits are charges that leak away, so it forgets when the power goes.
02Electrons are pushed onto a flash cell's floating gate. What happens to the cell?
The trapped negative charge cancels part of the control gate's push, so the gate needs a higher voltage to open the channel. At the read voltage the cell stays off, which reads as 0.
03A program wants to change one byte in a flash page that already holds data. What must happen?
Programming can only turn 1s into 0s, and erasing works on a whole block. So the controller writes the new data to an erased page and marks the old one as stale.
04Why does a flash controller do wear levelling?
Every erase wears the thin oxide a little. A single-level-cell chip is rated for about 100,000 erase cycles per block, denser chips for far fewer, so the controller keeps the erase counts even.
05Which flash type usually holds the firmware chip on a computer's main board, and which fills an SSD?
NOR flash gives fast random reads, so code can run straight from it: good for firmware. NAND packs cells into series strings for more bits in less space: good for SSDs, USB sticks and phone storage.
Glossary
- Non-volatile memory
- Memory that keeps its data when the power is off, such as ROM and flash. DRAM and SRAM are volatile.
- Mask ROM
- Read-only memory whose bits are fixed when the chip is made, by building or leaving out a transistor at each spot.
- Floating gate
- A conductor sealed in insulating oxide between a flash cell's control gate and its channel. Electrons placed on it stay trapped.
- Threshold voltage (Vth)
- The gate voltage at which a transistor's channel opens. Trapped electrons raise a flash cell's threshold.
- Page
- The unit flash reads and writes at once, for example 2,048 data bytes.
- Block
- The unit flash erases at once, made of many pages (for example 64). After an erase every bit is 1.
- Wear levelling
- Spreading writes and erases evenly over all blocks, so no block wears out early.
- NAND and NOR flash
- Two ways to wire flash cells: NOR gives fast random reads for code; NAND chains cells in strings for dense storage.
Notes and sources
- The figure is a teaching model: the block is drawn with 4 pages of 8 cells, the threshold gauge has no units, and the erase counts on the controller are illustrative.
- Page, block, endurance and retention figures are from Micron's MT29F1G08 SLC NAND datasheet: 64 pages per block, 2048 + 64 bytes per page, 100,000 program/erase cycles and 10 years of data retention.
- Erased flash reads as all 1s; programming can only turn 1s into 0s (Micron datasheet). Which voltage level means 1 is a convention that this lesson follows.
- Cells that store more than one bit wear out sooner: the Linux MTD documentation gives about 1,000 erase cycles for MLC NAND, against about 100,000 for NOR and SLC NAND.
- Many 3D NAND chips store the charge in a charge-trap layer of silicon nitride instead of a floating gate (Samsung, 2013). The threshold shift works the same way.
- In a mask ROM the bit pattern is set by the presence or absence of a transistor at each cross point; which of the two means 1 depends on the design.
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