Lesson 49 · Boards and embedded systems

Test and debug

A brand-new board rarely works the first time. Bring it up in order: check the power rails with a multimeter, check the clock with an oscilloscope, then load code with a debugger that can halt the CPU and read its registers. A logic analyser decodes the I2C bus, boundary scan over JTAG tests every signal pin, and a calm routine finds the fault.

12 min10 steps5 questionsAdvanced

Fig 49 · Interactive

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5 quick questions

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01You switch on a new board for the first time. What do you check first?

Power comes first: with a wrong or shorted supply nothing else can work, and parts can be damaged. Then clocks, then code.

02On an oscilloscope set to 20 ns per division, one cycle of a clock spans just over 4 divisions (83.3 ns). What is its frequency?

Frequency is 1 divided by the period: 1 / 83.3 ns = 12 MHz.

03What does an oscilloscope's trigger do?

Without a trigger every sweep starts at a random point and the wave slides and smears. The trigger lines every sweep up on the same edge.

04A logic analyser decodes an I2C read: START, 0x48 R ACK, 0x19 ACK, 0x00 NACK, STOP. What is 0x48?

After START the controller sends the 7-bit address and a read/write bit. 0x48 is the TMP102 sensor's address; 0x19 0x00 is its reading, 25.0 °C.

05Which of these can a JTAG or SWD debugger NOT do on its own?

Voltage is a job for the multimeter (or a scope). The debugger talks to the chip's debug logic: loading code, halting, reading registers and stepping.

Key terms

Glossary

Bring-up: Switching on a newly built board for the first time and getting it working, stage by stage: power, clocks, code.
Rail: A supply line that feeds many chips at one voltage, such as the 3.3 V rail.
Multimeter: A meter that measures voltage, current or resistance between its two probes.
Oscilloscope: An instrument that draws voltage against time; its trigger holds a repeating signal still on the screen.
Logic analyser: An instrument that records many digital lines at once as 0s and 1s and can decode bus protocols such as I2C and SPI.
I2C: A two-wire bus (clock SCL, data SDA) where a controller addresses chips by a 7-bit address and every byte is acknowledged.
JTAG / SWD: Debug ports: JTAG (IEEE 1149.1) uses TCK, TMS, TDI and TDO; Arm's SWD uses two wires, SWDIO and SWCLK, which often share pins with TMS and TCK.
Boundary scan: A JTAG feature (it needs TDI and TDO, so SWD cannot do it) that puts a test cell at every signal pin so a tester can drive and read the pins without running code, finding opens and shorts.

Fine print

Notes and sources

Power, then clocks, then code: each stage needs the one before it. A CPU with a bad supply or no clock cannot run code, and a debugger cannot talk to it.
The LM1117-3.3 regulator's datasheet allows 3.235 V to 3.365 V on its output from 0 °C to 125 °C at loads up to 800 mA (3.267 V to 3.333 V at 25 °C).
Period and frequency are inverses: T = 1 / f. At 12 MHz one cycle lasts 83.3 ns, which is 4.17 divisions at 20 ns per division.
SWD (Serial Wire Debug, from Arm) uses two pins, SWDIO and SWCLK. JTAG (IEEE 1149.1) uses TCK, TMS, TDI and TDO, with an optional reset TRST.
On I2C the controller sends a START, the 7-bit address with a read/write bit, and every byte is answered by an acknowledge bit. After the last byte it wants, the controller answers NACK and sends STOP.
The TMP102 sensor's 12-bit reading is the first byte followed by the top four bits of the second, at 0.0625 °C per step: 0x19 0x00 is 0x190 = 400 steps = 25.0 °C.
Boundary scan (IEEE 1149.1) is a JTAG feature: it needs the TDI and TDO pins as well as TCK and TMS, so SWD's two wires cannot do it. It puts a cell between each signal pin and the chip's core. Bits shifted in through TDI set the pins, and the captured pin values shift out through TDO, so a board test can find opens and shorts without running code.

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