Multiplexers: choosing one input
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A multiplexer, or mux, is a railway switch for data: several inputs come in, one output goes out, and select bits decide which input gets through. Build a 2-to-1 mux from a NOT, two ANDs and an OR, grow it to four inputs with two select bits, run it in reverse as a demultiplexer, and see why a CPU is full of them.
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01A 2-to-1 mux has A = 1, B = 0 and S = 1. What is Y?
Y = (NOT S AND A) OR (S AND B) = (0 AND 1) OR (1 AND 0) = 0. With S = 1 the mux passes B, and B is 0.
02How many select bits does an 8-to-1 multiplexer need?
Each select bit doubles the number of inputs it can choose from: 2^3 = 8, so three bits.
03A 4-to-1 mux has inputs D0 D1 D2 D3 = 0 0 1 1 and select bits S1 S0 = 10. What is Y?
10 in binary is 2, so the mux passes input D2, which is 1.
04What does a demultiplexer do?
A demux is the reverse of a mux: one input, several outputs, and the select bits decide which output receives the input.
05Which of these is a job a mux does inside a CPU?
A mux, under a control bit from the instruction decoder, picks the ALU's second operand: a register value or an immediate. Reading a register by its number is a mux too.
المسرد
- Multiplexer (mux)
- A circuit that passes one of several inputs to its single output; select bits choose which input.
- Select bits
- The control inputs of a mux or demux. Read as a binary number, they name the input (or output) to use.
- 2-to-1 mux
- The smallest mux: two inputs, one select bit. Y = (NOT S AND A) OR (S AND B).
- 4-to-1 mux
- A mux with four inputs and two select bits: 00, 01, 10 and 11 pick D0, D1, D2 and D3.
- Demultiplexer (demux)
- The reverse of a mux: one input, several outputs. The select bits choose which output receives the input; the others stay 0.
- ALU
- The arithmetic logic unit: the part of a CPU that adds, subtracts and does logic on its two inputs.
- Register
- A small, very fast storage slot inside the CPU, picked by its number.
الملاحظات والمصادر
- A multiplexer chooses one of N data inputs and passes it to its output according to its select signals. A 2:1 mux computes Y = D0·S' + D1·S, the same as Y = (NOT S AND A) OR (S AND B) here (Harris and Harris, Digital Design and Computer Architecture, section 2.8.1).
- An N:1 multiplexer needs log2(N) select lines: 1 for 2 inputs, 2 for 4, 3 for 8 (Harris and Harris, section 2.8.1). The TI SN74HC153 is a real 4-line to 1-line multiplexer with two select inputs.
- A demultiplexer sends its one input to the output named by its select bits and holds the other outputs at 0 (Nisan and Schocken, The Elements of Computing Systems, chapter 1: DMux and DMux4Way). The TI SN74HC139 is sold as a 2-line to 4-line decoder/demultiplexer.
- Processors use muxes to choose the ALU's second operand: a register value or the immediate from the instruction, under a control signal often called ALUSrc (Harris and Harris, section 7.3.1; Patterson and Hennessy, chapter 4). In the Hack computer a Mux16 picks the A register or memory as the ALU input (Nisan and Schocken, chapter 5).
- In Python, 1 - s turns a bit 0/1 into 1/0 (NOT), & and | on 0 and 1 work as AND and OR, and d[2 * s1 + s0] uses the select bits as a list index.
- In a real chip each bit is a high or low voltage on a wire; here a glowing lamp shows a 1. A lit wire with moving dashes carries a 1. The switch on the mux is a picture of the logic: the real circuit has no moving parts.
- Harris and Harris, Digital Design and Computer Architecture (sections 2.8.1 and 7.3)
- Nisan and Schocken, Nand2Tetris: Boolean logic (Mux, DMux) and the CPU
- Texas Instruments SN74HC153 datasheet: dual 4-line to 1-line multiplexer
- Texas Instruments SN74HC157 datasheet: quad 2-line to 1-line multiplexer
- Texas Instruments SN74HC139 datasheet: dual 2-line to 4-line decoder/demultiplexer
- MIT OpenCourseWare 6.004 Computation Structures
- Python reference: binary bitwise operations
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