Printed circuit board design
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Follow one small circuit from a drawing to a working board. A schematic for a microcontroller, a resistor and an LED becomes footprints, the footprints are placed on a 50 × 30 mm two-layer board, and copper traces, vias and a ground plane connect them. Then the design rule check, solder mask and silkscreen, the Gerber files sent to the factory, and assembly, until the LED lights.
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01What is a footprint?
A footprint matches the real package: pad sizes and spacing follow the part's legs. The 8-pin chip's legs are 1.27 mm apart, so its pads are too.
02On a 2-layer board, how does a connection get from the top copper layer to the bottom one?
A via is a small hole drilled through the board whose wall is plated with copper, joining a pad or trace on one layer to copper on the other. Here each ground pin drops through a via to the ground plane.
03By the IPC-2221 curve, about how much current can a 0.25 mm outer trace in 1 oz (35 µm) copper carry for a 10 °C rise?
The IPC-2221 fit gives about 0.88 A. A wider trace has more copper in its cross-section and carries more: 0.5 mm gives about 1.45 A.
04What does the solder mask do?
Solder mask is a thin coating over the copper with openings only at the pads. Silkscreen is the printed ink (labels such as U1 and R1) on top of it.
05What does a board factory need from the designer?
Gerber is the standard image format for PCB layers: top and bottom copper, solder mask and silkscreen. A drill file gives the position and size of each hole.
المسرد
- PCB
- Printed circuit board: a stiff board with copper tracks that connect and hold electronic parts.
- Schematic
- A wiring diagram: each part is a symbol and each net is a set of pins joined together.
- Footprint
- The copper pads and outline for one real part package, placed on the board layout.
- Trace
- A flat strip of copper on a board layer that connects pads, like a wire.
- Via
- A small hole drilled through the board and plated with copper, joining copper on different layers.
- Ground plane
- A large area of copper, often a whole layer, connected to ground (0 V).
- Design rules (DRC)
- The factory's limits, such as minimum trace width, gap and hole size; the design rule check tests the layout against them.
- Gerber file
- The standard image file for one PCB layer, sent to the factory with a drill file.
الملاحظات والمصادر
- The drawing is not to scale: traces, pads and parts are enlarged so they read at lesson size. The 50 × 30 mm outline is a teaching choice.
- Pin numbers follow the ATtiny85 datasheet: pin 8 is VCC, pin 4 is GND and pin 5 is PB0; the SOIC-8 package has a 1.27 mm lead pitch. The ATtiny85 runs from 2.7 to 5.5 V, so 3.3 V is in range.
- Trace current uses the IPC-2221 curve fit published by Advanced Circuits (outer layer, k = 0.048, 1 oz = 1.378 mil of copper): 0.25 mm ≈ 0.88 A and 0.5 mm ≈ 1.45 A for a 10 °C rise. IPC-2152 is the newer standard; it gives different values.
- Design rules are OSH Park's 2-layer limits: 6 mil (0.15 mm) trace and space, 10 mil (0.25 mm) drill, 1.6 mm board, 1 oz copper. Other factories publish their own.
- Current is drawn in the conventional direction, from + to the ground plane.
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